1 Introduction At present, grating devices are widely used as sensitive components for speed measurement and position measurement in various servo drives and their applications. Moreover, the form of two orthogonal square waves is widely used, and the real-time requirements of the system are extremely high. Therefore, for the main processing steps such as subdivision of the signal of the raster encoder, on the one hand, the problem of improving the resolution is considered, and at the same time, the problem of real-time needs to be considered. Although the application of high-speed single-chip microcomputer, DSP and other high-speed digital processing devices can greatly improve the real-time performance of the system, it takes a long time to perform the division operation, which is about several hundred microseconds, which cannot meet the real-time requirements of the system. Therefore, the software The method of segmentation is limited. At present, there are many methods that use pure hardware for subdivision, such as resistance chain subdivision, spatial subdivision, phase-locked multiplier, and a combination of two methods. The above several methods are widely used in practical applications, especially the resistance chain subdivision, which is a good solution in the case of low multiplication. However, in the case of high frequency doubling, it is inevitable that a large number of comparators are used, and the dead zone (lag zone) of the comparator is difficult to adjust. Among the methods of spatial subdivision, the main problem to be solved is the problem of accurate cutting level. The triangular wave cutting triangle wave scheme has many advantages, which can change the subdivision error caused by the use of zero crossing comparison. However, there are still a lot of problems with the use of comparators, which is cumbersome to adjust. The method of phase-locked frequency division subdivision, on the one hand, the cost is higher than the former two, on the other hand, it is relatively affected by the ambient temperature, and is rarely used in practical applications. In this paper, a new subdivision scheme is considered in principle, using a set of pure hardware signal subdivision schemes using absolute value, eight-limit theory, logic processing and processing of signals using ASIC devices (nanoseconds). And through the debugging and practical application, the feasibility of the program is verified. 2 subdivision principle and block diagram The subdivision is mainly composed of the following parts, taking absolute value, extracting limit signal, A/D conversion, checking subdivision table, logic operation, and so on. The filtering, amplifying and shaping circuits perform preliminary processing on the input original signals sinx and cosx, and satisfy the requirements of the subsequent circuits in terms of amplitude, symmetry, orthogonality and the like. Taking the absolute value circuit according to the diode turn-off conduction characteristics, combined with the basic working principle of the basic operational amplifier, design the hardware circuit to make its output of uo=|ui|, multiply the input signal, and the two signals are interleaved to form eightå¦Zone and corresponding limit signal. The A/D conversion module samples and converts the absolute value signal, as shown in Fig. 2: the analog multiplexer selects the absolute value signal under the action of the limit control signal, and its output is used as the input signal of the A/D conversion respectively. And reference signals. The A/D conversion is controlled by a sampling control signal whose output data corresponds to the phase signal at the sampling instant. If the correspondence between the data and the phase is described by a table, it is the subdivision table we created. However, due to the different subdivisions, there is no one-to-one correspondence between the two. 3 hardware design and debugging It can be seen from the principle that the technical key of the subdivision module is that the limit signal generated by the comparator shaping and the address signal generated by the A/D module must be synchronized, which is the key to whether the segmentation can be correctly performed. Therefore, in the circuit design process, the hysteresis of the comparator and its anti-interference ability are issues that must be considered and solved. In terms of anti-jamming, differential amplification can effectively suppress common mode interference. Considering the hysteresis problem, the shaping circuit is separated from the absolute value circuit. By adjusting the DC parameters of each op amp, the threshold signal and the absolute value signal can be approximately synchronized. Otherwise, the generated subdivided square wave will be zero crossing. It became confusing. As shown in FIG. 3, the absolute value and shaping of the sinx signal are used, which facilitates debugging and avoids interference and comparator lag. The logic control circuit and the operation module mainly complete logic such as sampling control of the A/D conversion module, read memory (subdivided table), and operation output subdivision orthogonal square wave. The entire module is implemented by an FPGA. The peripheral crystal oscillator provides a 10MHz clock, which is divided by the frequency division module to realize a pulse train with a period of 2μs (meeting the system's maximum 500kHz feedback requirement) as a sampling control signal. When the A/D conversion module completes the sampling conversion and the conversion end signal /INT is low, at this time, the limit signal and the address signal are valid on the address signal line of the memory, and after the logic judgment inside the FPGA, the read is issued (/ RD) command. The read data is latched and supplied to the post-sequence operation module, and the orthogonally-divided square wave is output after the judgment operation. 4 detection and test results We built a subdivision detection hardware platform consisting of a calibration system 1D flat turntable and a coaxial circular encoder. The digital display device displays the angle at which the calibration turret is actually rotated. At the same time, the host counts and displays the subdivided square wave through the interface circuit. After multiple measurements, the difference between the two display values ​​is e ≤ 1, that is, less than or equal to one. Equivalent, achieved the design purpose. At the same time, the servo-driven one-dimensional flat table system and detection mechanism are used to quantitatively detect and analyze the subdivision error. The initial position is 3′26.3′′, the last position is 2′50.7′′, and the difference is 3′26. 3′′-2′50.7′′=35.6′′, 36.0′′-35.6′′=0.4′′, the results are shown in Table 1. 5 Conclusion Pure hardware can meet the real-time requirements of the system, and the sampling speed is 2μs. At the same time, this method can achieve high frequency subdivision, which satisfies the requirements of most systems for two orthogonal feedback square waves, and can be used in raster encoder signal processing. Wrought Iron Door,Modern Iron Door Design,Iron Door And Window Design,Iron Door Ideas Lemon Building Material Co., Ltd. , https://www.lemonbuilding.com